To date, modern power semiconductor diodes such as high-voltage P-I-N diodes, as well as power transistors such as power MOSFETs and Insulated Gate Bipolar Transistors (IGBT), have been typically fabricated with silicon (Si) semiconductor materials. More recently, silicon carbide (SiC) power devices have been researched due to their superior properties. III-Nitride (III-N) semiconductor devices are now emerging as an attractive candidate to carry large currents and support high voltages, and provide very low on resistance, high voltage device operation, and fast switching times. As used herein, the terms III-N or III-Nitride materials, layers, devices, etc., refer to a material or device comprised of a compound semiconductor material according to the stoichiometric formula BwAlxInyGazN, where w+x+y+z is about 1.
An example of a III-N high electron mobility transistors (HEMT) of the prior art is shown in FIGS. 1 and 2. The III-N HEMT of FIG. 1 includes a substrate 10, a III-N channel layer 11, such as a layer of GaN, atop the substrate, and a III-N barrier layer 12, such as a layer of AlxGa1-xN, atop the channel layer. A two-dimensional electron gas (2DEG) channel 19 is induced in the channel layer 11 near the interface between the channel layer 11 and the barrier layer 12. Source and drain contacts 14 and 15, respectively, form ohmic contacts to the 2DEG channel. Gate contact 16 modulates the portion of the 2DEG in the gate region, i.e., directly beneath gate contact 16.
Field plates are commonly used in III-N devices to shape the electric field in the high-field region of the device in such a way that reduces the peak electric field and increases the device breakdown voltage, thereby allowing for higher voltage operation. An example of a field plated III-N HEMT of the prior art is shown in FIG. 2. In addition to the layers included in the device of FIG. 1, the device in FIG. 2 includes a field plate 18 which is connected to gate 16, and an insulator layer 13, such as a layer of SiN, is between the field plate 18 and the III-N barrier layer 12. Field plate 18 can include or be formed of the same material as gate 16. Insulator layer 13 can act as a surface passivation layer, preventing or suppressing voltage fluctuations at the surface of the III-N material adjacent to insulator layer 13.
Slant field plates have been shown to be particularly effective in reducing the peak electric field and increasing the breakdown voltage in III-N devices. A prior art III-N device similar to that of FIG. 2, but with a slant field plate 24, is shown in FIG. 3. In this device, gate 16 (i.e., the portion of electrode 29 that is between the vertical dashed lines) and slant field plate 24 are formed of a single electrode 29. Insulator layer 23, which can be SiN, is an electrode-defining layer that contains a recess which defines at least in part the shape of electrode 29. Electrode-defining layer 23 can also act as a surface passivation layer, preventing or suppressing voltage fluctuations at the surface of the III-N material adjacent to electrode-defining layer 23. The gate 16 and slant field plate 24 in this device can be formed by first depositing electrode-defining layer 23 over the entire surface of III-N barrier layer 12, then etching a recess through the electrode-defining layer 23 in the region containing gate 16, the recess including a slanted sidewall 25, and finally depositing electrode 29 at least in the recess and over the slanted sidewall 25.
Slant field plates, such as field plate 24 in FIG. 3, tend to spread the electric fields in the device over a larger volume as compared to conventional field plates, such as field plate 18 in FIG. 3, which do not include a slanted portion. Hence, slant field plates tend to be more effective at reducing the peak electric field in the underlying device, thereby allowing for larger operating and breakdown voltages.
When the device of FIG. 3 is biased in the off state with a large voltage applied to the drain 15 relative to the source 14, the electric field in the semiconductor layers 11 and 12 is spread over the horizontal length of the field plate 24. As such, for a given thickness of the electrode-defining layer 23, the horizontal length of the region which the electric field is spread over, is largely determined by the angle 26 which the field plate forms with the surface 28 of the underlying III-N material structure. A smaller angle 26 results in a greater spreading of the electric fields, allowing for correspondingly larger operating and breakdown voltages of the device. For example, in a III-N device with an electrode-defining layer 23 which is about 0.85 microns thick, an angle of about 40 degrees or less may be required for reliable 50V or 100V operation, whereas an angle of about 10 degrees or less may be required for reliable 300V or 600V operation. However, decreasing the angle 26 results in a longer lateral extension of the field plate 24 towards the drain 15, which can necessitate a larger spacing between the gate 16 and drain 15. Furthermore, it can be difficult to reproducibly fabricate slant field plates 24 with such small angles 26. Field plate structures that can provide adequate suppression of peak electric fields and can be fabricated reproducibly are desirable.